The present invention relates to a functional logic circuit verification device for verifying whether or not a functional logic circuit such as a VLSI can operate correctly, and in particular, to a functional logic circuit verification device for executing verification of a functional logic circuit that includes components which are difficult to be implemented and emulated by programmable logic elements such as FPGAs (Field Programmable Gate Arrays).
A variety of devices and methods have been employed for verifying functions of functional logic circuits (integrated circuits, systems, etc.). In such verification techniques, a circuit which is equivalent to the functional logic circuit is formed using electrically programmable logic elements, and the verification of the functional logic circuit is executed using the equivalent circuit. For example, a device which emulates electric hardware systems has been disclosed in Japanese Patent Application Laid-Open No.HEI2-245831. In the conventional technique, verification of a functional logic circuit is executed by preparing a circuit that is equivalent to the verified functional logic circuit by substituting each element of the verified functional logic circuit with a rewritable logic element and actually supplying electric signals to the equivalent circuit.
However, in such verification techniques, all the parts of the verified functional logic circuit including memory devices, arithmetic operation circuits, etc. are substituted with programmable logic elements such as FPGAs (Field Programmable Gate Arrays) in order to realize a totally logically equivalent circuit, even though the programmable logic elements such as FPGAs are not suitable or efficient for implementing the memory devices, arithmetic operation circuits, etc. The number of FPGAs which are necessary for implementing a memory device or an arithmetic operation circuit is very large, therefore, in such verification using FPGAs only, circuit scale of the equivalent circuit including a considerable number of FPGAs is necessitated to be very large, and thus the verification of the functional logic circuit can not be executed efficiently.
Further, a logically completed special-purpose input/output device is needed to be prepared specially in order to provide input/output to the equivalent circuit of the verified functional logic circuit, and thus data input/output to/from the equivalent circuit is impossible without implementing and manufacturing such a logically completed special-purpose input/output device.
It is therefore the primary object of the present invention to provide a functional logic circuit verification device, by which high-capacity memory, multiple-port memory, arithmetic operation circuits, etc., which are difficult to be emulated or implemented by programmable logic elements such as FPGAs, can be emulated and implemented by a functionally equivalent circuit that includes devices other than FPGAs, and thereby efficiency of the verification can be improved.
Another object of the present invention is to provide a functional logic circuit verification device, by which verification of functional logic circuits can easily be executed without the preparation of the special-purpose input/output device for the equivalent circuit.
Another object of the present invention is to provide a functional logic circuit verification device, in which the main part of the functional logic circuit verification device can be designed as a combination of FPGAs only on a circuit board, and thereby the design of the functional logic circuit verification device can be simplified.
In accordance with a first aspect of the present invention, there is provided a functional logic circuit verification device for verifying the operation of a functional logic circuit such as a VLSI, by which a circuit that is functionally equivalent to the verified functional logic circuit is implemented and the verification of the functional logic circuit is executed by actually supplying electric signals thereto. The functional logic circuit verification device comprises an equivalent logic circuit, a functional equivalent board, one or more functional equivalent board connectors, an input/output section and one or more input/output section connectors. The equivalent logic circuit, which is mounted on a circuit board, is composed of programmable logic elements so as to implement logic specifications of part of the verified functional logic circuit to the level of the gate circuit diagram of the part of the verified functional logic circuit. The functional equivalent board implements a circuit that is functionally equivalent to the other part of the verified functional logic circuit in point of input and output. The one or more functional equivalent board connectors connect the functional equivalent board to the circuit board on which the equivalent logic circuit is mounted. The input/output section implements input and output of the functional logic circuit verification device. And the one or more input/output section connectors connect the input/output section to the circuit board on which the equivalent logic circuit is mounted.
In accordance with a second aspect of the present invention, in the first aspect, the circuit board on which the equivalent logic circuit is mounted is an LSI socket board having a plurality of sockets for LSIs.
In accordance with a third aspect of the present invention, in the second aspect, the functional equivalent board connectors and/or the input/output section connectors are LSI pin-compatible connectors each of which has the same pin configuration as LSIs which are employed as the programmable logic elements of the equivalent logic circuit.
In accordance with a fourth aspect of the present invention, in the third aspect, the LSI pin-compatible connector is provided with buffers for ensuring driving abilities in connections.
In accordance with a fifth aspect of the present invention, in the first aspect, the programmable logic elements of which the equivalent logic circuit is composed are FPGAs (Field Programmable Gate Arrays).
In accordance with a sixth aspect of the present invention, in the fifth aspect, the functional equivalent board connectors and/or the input/output section connectors are FPGA pin-compatible connectors each of which has the same pin configuration as the FPGAs which are employed as the programmable logic elements of the equivalent logic circuit.
In accordance with a seventh aspect of the present invention, in the first aspect, the functional equivalent board includes data lines, address lines, control lines, a control logic circuit, connection switches, and flip-flops each of which having fan-out lines, and thereby implements a circuit that is functionally equivalent to a multiple-port memory in point of input and output.
In accordance with an eighth aspect of the present invention, in the seventh aspect, the functional equivalent board has an input/output interface that is equivalent to the input/output interface of the multiple-port memory which is emulated by the functional equivalent board.
In accordance with a ninth aspect of the present invention, in the first aspect, the functional equivalent board includes data lines, control lines, a general-purpose LSI, software for letting the general-purpose LSI execute a desired process, and a control logic circuit, and thereby implements a circuit that is functionally equivalent to an arithmetic operation circuit in point of input and output.
In accordance with a tenth aspect of the present invention, in the ninth aspect, the functional equivalent board has an input/output interface that is equivalent to the input/output interface of the arithmetic operation circuit which is emulated by the functional equivalent board.
In accordance with an eleventh aspect of the present invention, in the ninth aspect, the functional equivalent board further includes an operation program library means and an operation program generation means. Programs for predetermined operations such as addition, multiplication, division, etc. are preliminarily stored in the operation program library means. The operation program generation means generates a sequence of an operation program to be executed by the general-purpose LSI, based on arithmetic operation instructions which are supplied from the equivalent logic circuit via the control lines and using the programs extracted from the operation program library means.
In accordance with a twelfth aspect of the present invention, in the first aspect, the input/output section includes a computer, an interface of the computer to the circuit board on which the equivalent logic circuit is mounted, and control software which is executed by the computer for controlling the interface.
In accordance with a thirteenth aspect of the present invention, in the twelfth aspect, the control software of the input/output section prepares an instruction input/output interface and a data input/output interface in the interface of the computer according to a verification program/data, separates the verification program/data into instructions and data, sends the separated instructions to the instruction input/output interface so as to be inputted to the circuit board on which the equivalent logic circuit is mounted, and sends the separated data to the data input/output interface so as to be inputted to the circuit board.
In accordance with a fourteenth aspect of the present invention, in the thirteenth aspect, the control software of the input/output section adds special instructions for the functional equivalent board to the separated instructions, and sends the separated instructions including the special instructions to the instruction input/output interface so as to be inputted to the circuit board.
In accordance with a fifteenth aspect of the present invention, in the twelfth aspect, the interface of the input/output section includes a monitoring means for monitoring the input/output of data and instructions to/from the circuit board so that congestion will not occur in the input/output to/from the circuit board.